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| 82 | #define ECB_MEMORY_FENCE_RELEASE do { } while (0) /* unlikely to change in future cpus */ |
82 | #define ECB_MEMORY_FENCE_RELEASE do { } while (0) /* unlikely to change in future cpus */ |
| 83 | #elif __amd64 |
83 | #elif __amd64 |
| 84 | #define ECB_MEMORY_FENCE __asm__ __volatile__ ("mfence" : : : "memory") |
84 | #define ECB_MEMORY_FENCE __asm__ __volatile__ ("mfence" : : : "memory") |
| 85 | #define ECB_MEMORY_FENCE_ACQUIRE __asm__ __volatile__ ("lfence" : : : "memory") |
85 | #define ECB_MEMORY_FENCE_ACQUIRE __asm__ __volatile__ ("lfence" : : : "memory") |
| 86 | #define ECB_MEMORY_FENCE_RELEASE __asm__ __volatile__ ("sfence") /* play safe - not needed in any current cpu */ |
86 | #define ECB_MEMORY_FENCE_RELEASE __asm__ __volatile__ ("sfence") /* play safe - not needed in any current cpu */ |
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87 | #elif __powerpc__ || __ppc__ || __powerpc64__ || __ppc64__ |
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88 | #define ECB_MEMORY_FENCE __asm__ __volatile__ ("sync" : : : "memory") |
| 87 | #elif defined(__ARM_ARCH_6__ ) || defined(__ARM_ARCH_6J__ ) \ |
89 | #elif defined(__ARM_ARCH_6__ ) || defined(__ARM_ARCH_6J__ ) \ |
| 88 | || defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6ZK__) \ |
90 | || defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6ZK__) \ |
| 89 | || defined(__ARM_ARCH_7__ ) || defined(__ARM_ARCH_7A__ ) \ |
91 | || defined(__ARM_ARCH_7__ ) || defined(__ARM_ARCH_7A__ ) \ |
| 90 | || defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7R__ ) |
92 | || defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7R__ ) |
| 91 | #define ECB_MEMORY_FENCE \ |
93 | #define ECB_MEMORY_FENCE \ |
