… | |
… | |
100 | #if ECB_NO_SMP |
100 | #if ECB_NO_SMP |
101 | #define ECB_MEMORY_FENCE do { } while (0) |
101 | #define ECB_MEMORY_FENCE do { } while (0) |
102 | #endif |
102 | #endif |
103 | |
103 | |
104 | #ifndef ECB_MEMORY_FENCE |
104 | #ifndef ECB_MEMORY_FENCE |
105 | #if ECB_C11 && !defined __STDC_NO_ATOMICS__ |
|
|
106 | /* we assume that these memory fences work on all variables/all memory accesses, */ |
|
|
107 | /* not just C11 atomics and atomic accesses */ |
|
|
108 | #include <stdatomic.h> |
|
|
109 | #if 0 |
|
|
110 | #define ECB_MEMORY_FENCE atomic_thread_fence (memory_order_acq_rel) |
|
|
111 | #define ECB_MEMORY_FENCE_ACQUIRE atomic_thread_fence (memory_order_acquire) |
|
|
112 | #define ECB_MEMORY_FENCE_RELEASE atomic_thread_fence (memory_order_release) |
|
|
113 | #else |
|
|
114 | /* the above *should* be enough in my book, but after experiences with gcc-4.7 */ |
|
|
115 | /* and clang, better play safe */ |
|
|
116 | #define ECB_MEMORY_FENCE atomic_thread_fence (memory_order_seq_cst) |
|
|
117 | #endif |
|
|
118 | #endif |
|
|
119 | #endif |
|
|
120 | |
|
|
121 | #ifndef ECB_MEMORY_FENCE |
|
|
122 | #if ECB_GCC_VERSION(2,5) || defined __INTEL_COMPILER || (__llvm__ && __GNUC__) || __SUNPRO_C >= 0x5110 || __SUNPRO_CC >= 0x5110 |
105 | #if ECB_GCC_VERSION(2,5) || defined __INTEL_COMPILER || (__llvm__ && __GNUC__) || __SUNPRO_C >= 0x5110 || __SUNPRO_CC >= 0x5110 |
123 | #if __i386 || __i386__ |
106 | #if __i386 || __i386__ |
124 | #define ECB_MEMORY_FENCE __asm__ __volatile__ ("lock; orb $0, -1(%%esp)" : : : "memory") |
107 | #define ECB_MEMORY_FENCE __asm__ __volatile__ ("lock; orb $0, -1(%%esp)" : : : "memory") |
125 | #define ECB_MEMORY_FENCE_ACQUIRE ECB_MEMORY_FENCE /* non-lock xchg might be enough */ |
108 | #define ECB_MEMORY_FENCE_ACQUIRE __asm__ __volatile__ ("" : : : "memory") |
126 | #define ECB_MEMORY_FENCE_RELEASE do { } while (0) /* unlikely to change in future cpus */ |
109 | #define ECB_MEMORY_FENCE_RELEASE __asm__ __volatile__ ("") |
127 | #elif __amd64 || __amd64__ || __x86_64 || __x86_64__ |
110 | #elif __amd64 || __amd64__ || __x86_64 || __x86_64__ |
128 | #define ECB_MEMORY_FENCE __asm__ __volatile__ ("mfence" : : : "memory") |
111 | #define ECB_MEMORY_FENCE __asm__ __volatile__ ("mfence" : : : "memory") |
129 | #define ECB_MEMORY_FENCE_ACQUIRE __asm__ __volatile__ ("lfence" : : : "memory") |
112 | #define ECB_MEMORY_FENCE_ACQUIRE __asm__ __volatile__ ("" : : : "memory") |
130 | #define ECB_MEMORY_FENCE_RELEASE __asm__ __volatile__ ("sfence") /* play safe - not needed in any current cpu */ |
113 | #define ECB_MEMORY_FENCE_RELEASE __asm__ __volatile__ ("") |
131 | #elif __powerpc__ || __ppc__ || __powerpc64__ || __ppc64__ |
114 | #elif __powerpc__ || __ppc__ || __powerpc64__ || __ppc64__ |
132 | #define ECB_MEMORY_FENCE __asm__ __volatile__ ("sync" : : : "memory") |
115 | #define ECB_MEMORY_FENCE __asm__ __volatile__ ("sync" : : : "memory") |
133 | #elif defined __ARM_ARCH_6__ || defined __ARM_ARCH_6J__ \ |
116 | #elif defined __ARM_ARCH_6__ || defined __ARM_ARCH_6J__ \ |
134 | || defined __ARM_ARCH_6K__ || defined __ARM_ARCH_6ZK__ |
117 | || defined __ARM_ARCH_6K__ || defined __ARM_ARCH_6ZK__ |
135 | #define ECB_MEMORY_FENCE __asm__ __volatile__ ("mcr p15,0,%0,c7,c10,5" : : "r" (0) : "memory") |
118 | #define ECB_MEMORY_FENCE __asm__ __volatile__ ("mcr p15,0,%0,c7,c10,5" : : "r" (0) : "memory") |
136 | #elif defined __ARM_ARCH_7__ || defined __ARM_ARCH_7A__ \ |
119 | #elif defined __ARM_ARCH_7__ || defined __ARM_ARCH_7A__ \ |
137 | || defined __ARM_ARCH_7M__ || defined __ARM_ARCH_7R__ |
120 | || defined __ARM_ARCH_7M__ || defined __ARM_ARCH_7R__ |
138 | #define ECB_MEMORY_FENCE __asm__ __volatile__ ("dmb" : : : "memory") |
121 | #define ECB_MEMORY_FENCE __asm__ __volatile__ ("dmb" : : : "memory") |
139 | #elif __sparc || __sparc__ |
122 | #elif __sparc || __sparc__ |
140 | #define ECB_MEMORY_FENCE __asm__ __volatile__ ("membar #LoadStore | #LoadLoad | #StoreStore | #StoreLoad | " : : : "memory") |
123 | #define ECB_MEMORY_FENCE __asm__ __volatile__ ("membar #LoadStore | #LoadLoad | #StoreStore | #StoreLoad" : : : "memory") |
141 | #define ECB_MEMORY_FENCE_ACQUIRE __asm__ __volatile__ ("membar #LoadStore | #LoadLoad" : : : "memory") |
124 | #define ECB_MEMORY_FENCE_ACQUIRE __asm__ __volatile__ ("membar #LoadStore | #LoadLoad" : : : "memory") |
142 | #define ECB_MEMORY_FENCE_RELEASE __asm__ __volatile__ ("membar #LoadStore | #StoreStore") |
125 | #define ECB_MEMORY_FENCE_RELEASE __asm__ __volatile__ ("membar #LoadStore | #StoreStore") |
143 | #elif defined __s390__ || defined __s390x__ |
126 | #elif defined __s390__ || defined __s390x__ |
144 | #define ECB_MEMORY_FENCE __asm__ __volatile__ ("bcr 15,0" : : : "memory") |
127 | #define ECB_MEMORY_FENCE __asm__ __volatile__ ("bcr 15,0" : : : "memory") |
145 | #elif defined __mips__ |
128 | #elif defined __mips__ |
146 | #define ECB_MEMORY_FENCE __asm__ __volatile__ ("sync" : : : "memory") |
129 | #define ECB_MEMORY_FENCE __asm__ __volatile__ ("sync" : : : "memory") |
147 | #elif defined __alpha__ |
130 | #elif defined __alpha__ |
148 | #define ECB_MEMORY_FENCE __asm__ __volatile__ ("mb" : : : "memory") |
131 | #define ECB_MEMORY_FENCE __asm__ __volatile__ ("mb" : : : "memory") |
|
|
132 | #elif defined __hppa__ |
|
|
133 | #define ECB_MEMORY_FENCE __asm__ __volatile__ ("" : : : "memory") |
|
|
134 | #define ECB_MEMORY_FENCE_RELEASE __asm__ __volatile__ ("") |
|
|
135 | #elif defined __ia64__ |
|
|
136 | #define ECB_MEMORY_FENCE __asm__ __volatile__ ("mf" : : : "memory") |
149 | #endif |
137 | #endif |
150 | #endif |
138 | #endif |
151 | #endif |
139 | #endif |
152 | |
140 | |
153 | #ifndef ECB_MEMORY_FENCE |
141 | #ifndef ECB_MEMORY_FENCE |
154 | #if ECB_GCC_VERSION(4,7) |
142 | #if ECB_GCC_VERSION(4,7) |
155 | /* unsolved mystery: ACQ_REL should be enough, but doesn't generate any code */ |
143 | /* see comment below about the C11 memory model. in short - avoid */ |
156 | /* which in turn actually breaks libev */ |
|
|
157 | #define ECB_MEMORY_FENCE __atomic_thread_fence (__ATOMIC_SEQ_CST) |
144 | #define ECB_MEMORY_FENCE __atomic_thread_fence (__ATOMIC_SEQ_CST) |
158 | #elif defined __clang && __has_feature (cxx_atomic) |
145 | #elif defined __clang && __has_feature (cxx_atomic) |
159 | /* see above */ |
146 | /* see above */ |
160 | #define ECB_MEMORY_FENCE __c11_atomic_thread_fence (__ATOMIC_SEQ_CST) |
147 | #define ECB_MEMORY_FENCE __c11_atomic_thread_fence (__ATOMIC_SEQ_CST) |
161 | #elif ECB_GCC_VERSION(4,4) || defined __INTEL_COMPILER || defined __clang__ |
148 | #elif ECB_GCC_VERSION(4,4) || defined __INTEL_COMPILER || defined __clang__ |
… | |
… | |
179 | #define ECB_MEMORY_FENCE __sync () |
166 | #define ECB_MEMORY_FENCE __sync () |
180 | #endif |
167 | #endif |
181 | #endif |
168 | #endif |
182 | |
169 | |
183 | #ifndef ECB_MEMORY_FENCE |
170 | #ifndef ECB_MEMORY_FENCE |
|
|
171 | #if ECB_C11 && !defined __STDC_NO_ATOMICS__ |
|
|
172 | /* we assume that these memory fences work on all variables/all memory accesses, */ |
|
|
173 | /* not just C11 atomics and atomic accesses */ |
|
|
174 | #include <stdatomic.h> |
|
|
175 | /* unfortunately, the C11 memory model seems to be very limited, and unable to express */ |
|
|
176 | /* simple barrier semantics. That means we need to take out thor's hammer. */ |
|
|
177 | #define ECB_MEMORY_FENCE atomic_thread_fence (memory_order_seq_cst) |
|
|
178 | #endif |
|
|
179 | #endif |
|
|
180 | #endif |
|
|
181 | |
|
|
182 | #ifndef ECB_MEMORY_FENCE |
184 | #if !ECB_AVOID_PTHREADS |
183 | #if !ECB_AVOID_PTHREADS |
185 | /* |
184 | /* |
186 | * if you get undefined symbol references to pthread_mutex_lock, |
185 | * if you get undefined symbol references to pthread_mutex_lock, |
187 | * or failure to find pthread.h, then you should implement |
186 | * or failure to find pthread.h, then you should implement |
188 | * the ECB_MEMORY_FENCE operations for your cpu/compiler |
187 | * the ECB_MEMORY_FENCE operations for your cpu/compiler |